Cypress Semiconductor CY25819 Specificatieblad - Pagina 4

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Table 5. Timing Electrical Characteristics Vdd = 3.3V ±10%, T
Parameter
Description
ICLKFR1
Input Frequency Range
ICLKFR2
Input Frequency Range
trise1
Clock Rise Time
tfall1
Clock Fall Time
CDCin
Input Clock Duty Cycle
CDCout
Output Clock Duty Cycle
CCJss
Cycle-to-Cycle Jitter
CCJref
Cycle-to-Cycle Jitter
Characteristics Curves
The following curves demonstrate the characteristic behavior
of the CY25818/19 when tested over a number of environ-
mental and application specific parameters. These are typical
performance curves and are not meant to replace any
parameter specified in Table 4 and Table 5.
3 0 0
2 9 0
R EFC L K C Y2 5 8 18
2 8 0
2 7 0
2 6 0
2 5 0
2 4 0
2 3 0
S S C LK C Y2 5 8 18
2 2 0
2 1 0
2 0 0
8
1 2
1 6
F r e q ue nc y ( M H z )
Figure 2. CCJ (ps) vs. Frequency (MHz)
2.75
2.5
12 MHz
2.25
2
1.75
-40
-25
-10
5
20
Figure 3. Bandwidth% vs. Temperature
Notes:
1. Single Power Supply: The voltage on any input or I/O pin cannot exceed the power pin during power-up.
2. Operation at any Absolute Maximum Rating is not implied.
Document #: 38-07362 Rev. *B
Conditions
CY25818
CY25819
SSCLK and REFCLK, 0.4V to 2.4V
SSCLK and REFCLK, 0.4V to 2.4V
X
IN
SSCLK and REFCLK @ 1.5V
SSCLK; F
= F
IN
REFCLK; F
= F
IN
R EFC L K C Y2 5 8 19
S S C LK C Y2 5 8 19
2 0
2 4
2 8
3 2
32.0 MHz
35
50
65
80
95
110
125
Temp (C)
= 0°C to +70°C and C
A
L
Min.
8
16
2.0
2.0
20
45
= 8–32 MHz
OUT
= 8–32 MHz
OUT
2 0
19
C Y 2 5 8 18
18
8 - 16 M H z
17
16
15
14
13
12
11
10
8
12
Figure 4. IDD (mA) vs. Frequency (MHz)
3.1
3
2.9
2.8
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2
1.9
1.8
2.8
2.9
3
Figure 5. Bandwidth% vs. Vdd
CY25818/19
= 15 pF (unless otherwise noted)
Typ.
Max.
Unit
–
16
MHz
–
32
MHz
3.0
4.0
3.0
4.0
50
80
50
55
250
350
275
375
C Y 2 5 8 19
16 - 3 2 M H z
16
2 0
2 4
2 8
F r e q ue nc y ( M H z )
CY25819@32 MHz
3.1
3.2
3.3
3.4
3.5
3.6
VDD (volts)
Page 4 of 7
ns
ns
%
%
ps
ps
3 2
3.7
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