Cypress Semiconductor MoBL CY62126EV30 Specificatieblad

Blader online of download pdf Specificatieblad voor {categorie_naam} Cypress Semiconductor MoBL CY62126EV30. Cypress Semiconductor MoBL CY62126EV30 14 pagina's. 1-mbit (64k x 16) static ram

Pagina afdrukken
Features
High speed: 45 ns
■
Temperature ranges
■
Industrial: –40°C to +85°C
❐
Automotive: –40°C to +125°C
❐
Wide voltage range: 2.2V to 3.6V
■
Pin compatible with CY62126DV30
■
Ultra low standby power
■
Typical standby current: 1 μA
❐
Maximum standby current: 4 μA
❐
Ultra low active power
■
Typical active current: 1.3 mA at f = 1 MHz
❐
Easy memory expansion with CE and OE features
■
Automatic power down when deselected
■
CMOS for optimum speed and power
■
Offered in Pb-free 48-ball VFBGA and 44-pin TSOP II
■
packages
Logic Block Diagram
Note
1. For best practice recommendations, refer to the Cypress application note
Cypress Semiconductor Corporation
Document #: 38-05486 Rev. *E
1-Mbit (64K x 16) Static RAM

Functional Description

The CY62126EV30 is a high performance CMOS static RAM
organized as 64K words by 16 bits
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
applications such as cellular telephones. The device also has an
automatic power down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device in standby mode reduces power consumption by more
than 99 percent when deselected (CE HIGH). The input and
output pins (IO
state when:
Deselected (CE HIGH)
■
Outputs are disabled (OE HIGH)
■
Both Byte High Enable and Byte Low Enable are disabled
■
(BHE, BLE HIGH)
Write operation is active (CE LOW and WE LOW)
■
To write to the device, take Chip Enable (CE) and Write Enable
(WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data
from IO pins (IO
specified on the address pins (A
Enable (BHE) is LOW, then data from IO pins (IO
is written into the location specified on the address pins (A
through A
To read from the device, take Chip Enable (CE) and Output
Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If
Byte Low Enable (BLE) is LOW, then data from the memory
location specified by the address pins appear on IO
Byte High Enable (BHE) is LOW, then data from memory
appears on IO
complete description of read and write modes.
AN1064, SRAM System Guidelines.
•
198 Champion Court
MoBL
through IO
) are placed in a high impedance
0
15
through IO
) is written into the location
0
7
0
).
15
to IO
. See the
"Truth Table"
8
15
,
•
San Jose
CA 95134-1709
®
,CY62126EV30
[1]
. This device features
®
) in portable
through A
). If Byte High
15
through IO
)
8
15
0
to IO
. If
0
7
on page 9 for a
•
408-943-2600
Revised January 5, 2009
[+] Feedback