Cypress Semiconductor STK14C88-5 Specificatieblad - Pagina 9
Blader online of download pdf Specificatieblad voor {categorie_naam} Cypress Semiconductor STK14C88-5. Cypress Semiconductor STK14C88-5 18 pagina's. 256 kbit (32k x 8) autostore nvsram
Pagina afdrukken
AC Switching Characteristics
SRAM Read Cycle
Parameter
Cypress
Alt
Parameter
t
t
ACE
ELQV
[9]
t
t
t
AVAV,
ELEH
RC
[10]
t
t
AVQV
AA
t
t
DOE
GLQV
[10]
t
t
AXQX
OHA
[11]
t
t
ELQX
LZCE
[11]
t
t
EHQZ
HZCE
[11]
t
t
GLQX
LZOE
[11]
t
t
GHQZ
HZOE
[8]
t
t
ELICCH
PU
[8]
t
t
EHICCL
PD
Switching Waveforms
Notes
9. WE and HSB must be HIGH during SRAM Read cycles.
10. Device is continuously selected with CE and OE both Low.
11. Measured ±200 mV from steady state output voltage.
Document Number: 001-51038 Rev. **
Description
Chip Enable Access Time
Read Cycle Time
Address Access Time
Output Enable to Data Valid
Output Hold After Address Change
Chip Enable to Output Active
Chip Disable to Output Inactive
Output Enable to Output Active
Output Disable to Output Inactive
Chip Enable to Power Active
Chip Disable to Power Standby
Figure 8. SRAM Read Cycle 1: Address Controlled
Figure 9. SRAM Read Cycle 2: CE and OE Controlled
STK14C88-5
35 ns
45 ns
Min
Max
Min
Max
35
35
45
35
15
5
5
5
5
13
0
0
13
0
0
35
[9, 10]
[9]
Unit
45
ns
ns
45
ns
20
ns
ns
ns
15
ns
ns
15
ns
ns
45
ns
Page 9 of 17
[+] Feedback