Cypress Semiconductor STK14C88-5 Ficha de especificações - Página 11
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AutoStore or Power Up RECALL
Parameter
Alt
[15]
t
t
RESTORE
HRECALL
[16]
t
t
HLHZ
STORE
[16]
t
t
t
HLQZ ,
BLQZ
DELAY
V
SWITCH
V
RESET
t
VCCRISE
[13]
t
VSBL
Switching Waveforms
WE
Notes
15. t
starts from the time V
HRECALL
CC
16. CE and OE low and WE high for output behavior.
17. HSB is asserted low for 1us when V
takes place.
Document Number: 001-51038 Rev. **
Description
Power up RECALL Duration
STORE Cycle Duration
Time Allowed to Complete SRAM Cycle
Low Voltage Trigger Level
Low Voltage Reset Level
V
Rise Time
CC
Low Voltage Trigger (V
Figure 12. AutoStore/Power Up RECALL
rises above V
.
SWITCH
drops through V
. If an SRAM WRITE has not taken place since the last nonvolatile cycle, HSB is released and no store
CAP
SWITCH
Min
1
4.0
150
) to HSB low
SWITCH
STK14C88-5
STK14C88-5
Unit
Max
550
10
ms
4.5
3.6
300
Page 11 of 17
μs
μs
V
V
μs
ns
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