EG&G ORTEC 416 Руководство по эксплуатации - Страница 10
Просмотреть онлайн или скачать pdf Руководство по эксплуатации для Портативный генератор EG&G ORTEC 416. EG&G ORTEC 416 15 страниц. Gate and delay generator
5 - 1
5. CIRCUIT DESCRIPTION
Diodes D6 and D7 form o current limiting protection circuit to protect against
large amplitude signals. Q13, Q14, and Q15 form a dc-coupled Schmitt trigger
which has fast rise-time and a width equal to the width of the input signal. The
current pulse at the collector of Q14 is differentiated by L2. D1, in turn, clips
the negative portion of the differentiated pulse and passes the positive portion to
the base of Q1 . The positive portion of the pulse triggers the delay multivibrator,
which is composed of Ql, Q2, Q3, and Q4. When triggered, this multivibrator
sets a voltage step onto a capacitor, either C4 or C5, and then this capacitor
is discharged with a constant current which is furnished by way of Q4 and is con
trolled by the delay potentiometer, R11 . Since it is a constant current discharge,
the delay will be linear. Diode D2 provides the dc bias necessary to hold Q2 in
the conduction state until the multivibrator is triggered, at which time the voltage
pulse from the emitter of Q3 is fed over to cut off the diode. It will remain off
until the multivibrator recovers. D3 provides a dc restoration for the capacity
coupling by C3 of the output pulse from the delay multivibrator. This output pulse
is emitter-follower buffered through Q5 and is called the DELAY PERIOD output.
The DELAY PERIOD output pulse is differentiated by means of LI, and the differen
tiated pulse is fed to the base of Q6, which is normally off emitter follower, but
the negative portion which occurs at the trailing edge of the DELAY PERIOD pulse
will be fed out as a DELAY MARKER pulse. When 06 conducts, it furnishes the
DELAY MARKER pulse at the output and an inversion of the DELAY MARKER pulse
at its collector which is ac-coupled to the base of 07. This pulse triggers the
gate pulse generator composed of Q7, Q8, and Q9. When the gate pulse generator
is triggered, the constant current that is flowing through Q8 will be switched through
07, and an output pulse which is the constant current multiplied by the sum of R25
and the amplitude control, R24, will be fed to the base of OlO, and is the generation
of the gate pulse. Again, D5 forms a dc restoration for the capacity coupling of
C12. O10 is a phase splitter which forms two pulses of equal amplitude but opposite
polarity. The positive pulse is fed to the base of 011 and the negative to the base
of Q12. Ql 1 and Q12 are an NPN and PNP pair that are both in the cut-off state until
the gate pulse arrives, at which time they turn on for the period of the gate pulse
and present an output at their respective output connectors. The gate pulse width is
controlled by the RC combination composed of C11 and the series resistance, R29 and
R28. R28 is the GATE WIDTH control.
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