Cypress Semiconductor CY7C1006D Şartname Sayfası - Sayfa 6

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Sayfayı Yazdır
Data Retention Characteristics
Parameter
V
V
for Data Retention
DR
CC
I
Data Retention Current
CCDR
[4]
t
Chip Deselect to Data Retention Time
CDR
[13, 14]
t
Operation Recovery Time
R
Data Retention Waveform
V
CC
CE

Switching Waveforms

Read Cycle No.1 (Address Transition Controlled)
ADDRESS
DATA OUT
PREVIOUS DATA VALID
Read Cycle No. 2 (OE Controlled)
ADDRESS
CE
OE
HIGH IMPEDANCE
DATA OUT
t
V
PU
CC
SUPPLY
CURRENT
Notes
13. Full device operation requires linear V
14. t
< 3 ns for all speeds.
r
15. Device is continuously selected, OE and CE = V
16. WE is HIGH for read cycle.
Document #: 38-05459 Rev. *E
(Over the Operating Range)
Description
V
CC
V
IN
DATA RETENTION MODE
4.5V
t
CDR
[15, 16]
t
AA
t
OHA
[16, 17]
t
RC
t
ACE
t
DOE
t
LZOE
t
LZCE
50%
> 50 µs or stable at V
ramp from V
to V
CC
DR
CC(min)
.
IL
Conditions
= V
= 2.0V, CE > V
– 0.3V,
DR
CC
> V
– 0.3V or V
< 0.3V
CC
IN
V
> 2V
DR
t
RC
DATA VALID
> 50 µs.
CC(min)
CY7C106D
CY7C1006D
Min
Max
Unit
2.0
V
3
mA
0
ns
t
ns
RC
4.5V
t
R
DATA VALID
t
HZOE
t
HZCE
HIGH
IMPEDANCE
t
PD
I
CC
50%
I
SB
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