DG FPGA Mise en place - Page 15

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DG FPGA Mise en place
dg_toeudp25gip_fpgasetup_xilinx.doc
3 Test environment setup when using two FPGAs
Before running the test, please prepare following test environment.
• Two FPGA development boards which can be the same board or different board: KCU116,
VCU118 board, and FB2CGHH@KU15P card
• 25Gb Ethernet cable:
a) VCU118 and FB2CGHH@KU15P card: SFP28 transceiver (25GBASE-SR), QSFP28
transceiver (100GBASE-SR) and MTP to 4xLC Fiber cable
b) KCU116: 25G SFP28 Active Optical Cable (AOC).
• USB cable for connecting between FPGA and PC
a) KCU116 and VCU118: 2 micro USB cables for programming FPGA and Serial console
b) FB2CGHH@KU15P card: mini USB cable for programming FPA and JTAGUART
• VCU118 and KCU116 board: Serial console software such as TeraTerm, installed on PC.
The setting on the console is Baudrate=115,200, Data=8-bit, Non-parity and Stop=1.
Note: JTAG Terminal in applied instead of Serial console when using FB2CGHH@KU15P
card.
• Vivado tool for programming FPGA and JTAG Terminal (when using FB2CGHH@KU15P
card), installed on PC
7-Jun-21
Page 15