Dynamic Engineering PCIe 8L XMC X1 User Manual - Page 9

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XMC Module Backplane IO Interface Pin Assignment

The figure below gives the pin assignments for the XMC Module IO Interface – from
Pn4 to the PCIe8LXMCX1connectors. Also see the User Manual for your XMC board for
more information. Please note that P2 or P3, P4 or P5 are installed not both.
DIN IDC [P13]
A1
C1
A2
C2
A3
C3
A4
C4
A5
C5
A6
C6
A7
C7
A8
C8
A9
C9
A10
C10
A11
C11
A12
C12
A13
C13
A14
C14
A15
C15
A16
C16
A17
C17
A18
C18
A19
C19
A20
C20
A21
C21
A22
C22
A23
C23
A24
C24
A25
C25
A26
C26
A27
C27
A28
C28
A29
C29
A30
C30
A31
C31
A32
C32
FIGURE 1
Read table:
P13-C1 = P2-35 = Pn4-1
P13-A1 = P2-1 = Pn4-3
etc.
SCSI II [P2]
1
35
2
36
3
37
4
38
5
39
6
40
7
41
8
42
9
43
10
44
11
45
12
46
13
47
14
48
15
49
16
50
17
51
18
52
19
53
20
54
21
55
22
56
23
57
24
58
25
59
26
60
27
61
28
62
29
63
30
64
31
65
32
66
33
67
Open, +3 or GND via J2,19 silk screen defined
34
68
Open, +3 or GND via J3,20
Embedded Solutions
Pn4
3
1
4
2
7
5
8
6
11
9
12
10
15
13
16
14
19
17
20
18
23
21
24
22
27
25
28
26
31
29
32
30
35
33
36
34
39
37
40
38
43
41
44
42
47
45
48
46
51
49
52
50
55
53
56
54
59
57
60
58
63
61
64
62
PCIE8LXMCX1 PN4 INTERFACE STANDARD
Page 9