Dell PowerEdge M910 Teknik Kılavuz - Sayfa 9

Anahtar Dell PowerEdge M910 için çevrimiçi göz atın veya pdf Teknik Kılavuz indirin. Dell PowerEdge M910 45 sayfaları. M-series blade servers
Ayrıca Dell PowerEdge M910 için: Güncelleme Kılavuzu (44 sayfalar), Güncelleme Kılavuzu (21 sayfalar), Güncelleme Kılavuzu (14 sayfalar), Kurulum Kılavuzu (7 sayfalar), Güncelleme Kılavuzu (28 sayfalar), Başlangıç Kılavuzu (12 sayfalar), Başlangıç Kılavuzu (12 sayfalar), Teknik Kılavuz (46 sayfalar), Portföy Kılavuzu (27 sayfalar), Başlangıç Kılavuzu (14 sayfalar), Başlangıç Kılavuzu (12 sayfalar), Teknik Kılavuz (49 sayfalar)

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2 Key technologies

The PowerEdge M910 implements a number of key technologies:



Intel Xeon processor E7-2800, E7-4800 and E7-8800 product families



Intel 7510 chipset



FlexMem Bridge



I/O Hub (IOH) with Intel QuickPath Architecture



DDR3 memory



PCI Express

(PCIe) 2.0



Optional Redundant SD media for embedded hypervisor



Integrated Dell Remote Access Controller 6 (iDRAC6) Express

Intel 7510 chipset

The 7510 chipset is designed to support Intel Xeon processor E7-2800, E7-4800 and E7-8800

product families, Intel Xeon processor 6500 and 7500 series 4S family, Intel QuickPath Interconnect

(QPI), DDR3 memory technology and PCIe 2.0.

Intel processors

Key features of the Intel Xeon processor E7-2800, E7-4800 and E7-8800 product families include:



Up to ten cores per processor



Up to 30MB shared L3 cache



32nm process technology



Intel Trusted Execution Technology (TXT) and AESNI (AES New Instructions)



RAS DDDC (Double Device Data Correct)



Intel HyperThreading (2 threads/core)

Key features of the Intel Xeon processor 6500 and 7500 series include:



Up to eight cores per processor



Four full-width, bidirectional point-to-point Intel QuickPath Interconnect (QPI) links at 6.4GT/s



Four Intel Scalable Memory Interconnects (SMI) at 6.4 GT/s



Socket: LS, LGA 1567 package



No termination required for non-populated processors (must populate processor socket one

first)



64-byte cache line size



RISC/CISC hybrid architecture



Compatible with existing x86 code base



Optimized for 32-bit code



MMX™ support



Execute Disable Bit



Intel Wide Dynamic Execution (Executes up to four instructions per clock cycle)



Simultaneous Multi-Threading (SMT) capability (2 threads/core)

PowerEdge M910 Technical Guide