HP 234664-002 - ProLiant - ML330T02 Genel Bakış - Sayfa 8

Masaüstü HP 234664-002 - ProLiant - ML330T02 için çevrimiçi göz atın veya pdf Genel Bakış indirin. HP 234664-002 - ProLiant - ML330T02 20 sayfaları. Visualization and acceleration in hp proliant servers
Ayrıca HP 234664-002 - ProLiant - ML330T02 için: Sıkça Sorulan Sorular (4 sayfalar), Uygulama Kılavuzu (35 sayfalar), Teknik Beyaz Kitap (12 sayfalar), Ürün Yazılımı Güncellemesi (9 sayfalar), Uygulama Kılavuzu (26 sayfalar), Giriş Kılavuzu (22 sayfalar), Sorun Giderme Kılavuzu (18 sayfalar), Uygulama Kılavuzu (11 sayfalar), Kurulum Kılavuzu (2 sayfalar), Yapılandırma Kılavuzu (2 sayfalar), Giriş Kılavuzu (19 sayfalar), Güncelleme Kılavuzu (9 sayfalar), Güncelleme Kılavuzu (16 sayfalar), Giriş Kılavuzu (10 sayfalar), Kurulum Talimatları Kılavuzu (15 sayfalar), Teknoloji Özeti (9 sayfalar)

DIMM Configurations

Each DRAM chip on a DIMM provides either 4 bits or 8 bits of a 64-bit data word. Chips that

provide 4 bits are called x4 (by 4), and chips that provide 8 bits are called x8 (by 8). It takes eight

x8 chips or sixteen x4 chips to make a 64-bit word, so at least eight chips are located on one or both

sides of a DIMM. However, a standard DIMM has enough room to hold a ninth chip on each side.

The ninth chip is used to store 4 bits or 8 bits of Error Correction Code, or ECC (see "Parity and ECC

DIMMs" sidebar on next page).

An ECC DIMM with all nine DRAM chips on one side is called single-sided, and an ECC DIMM with

nine DRAM chips on each side is called double-sided (Figure 7). A single-sided x8 ECC DIMM and a

double-sided x4 ECC DIMM each create a single block of 72 bits (64 bits plus 8 ECC bits). In both

cases, a single chip-select signal from the chipset is used to activate all the chips on the DIMM. In

contrast, a double-sided x8 DIMM (bottom illustration) requires two chip-select signals to access two

72-bit blocks on two sets of DRAM chips.

In addition to single-sided and double-sided configurations, DIMMs are classified as single-rank or

dual-rank. A memory rank is defined as an area or block of 64-bits created by using some or all of

the DRAM chips on a DIMM. For an ECC DIMM, a memory rank is a block of 72 data bits (64 bits

plus 8 ECC bits).

A single-rank ECC DIMM (x4 or x8) uses all of its DRAM chips to create a single block of 72 bits, and

all the chips are activated by one chip-select signal from the chipset (top two illustrations in Figure 7).

A dual-rank ECC DIMM produces two 72-bit blocks from two sets of DRAM chips on the DIMM,

requiring two chip-select signals. The chip-select signals are staggered so that both sets of DRAM

chips do not contend for the memory bus at the same time. Quad-rank DIMMs with ECC produces

four 72-bit blocks from four sets of DRAM chips on the DIMM, requiring four chip-select signals. Like

the dual-rank DIMMs, the memory controller staggers the chip-select signals to prevent the four sets of

DRAM chips from contending for the memory bus at the same time.

Figure 7. Single-sided and double-sided DDR SDRAM DIMMs and corresponding DIMM rank