DG FPGA Mise en place - Page 12
Parcourez en ligne ou téléchargez le pdf Mise en place pour {nom_de_la_catégorie} DG FPGA. DG FPGA 14 pages.
Également pour DG FPGA : Mise en place (5 pages), Mise en place (20 pages), Mise en place (8 pages), Mise en place (10 pages), Mise en place (18 pages)
dg_nvmeip_raid0x2_fpgasetup_xilinx_en.doc
8) Check LED status on FPGA board. The description of LED is as follows.
GPIO LED
0
1
2
3
9) After programming completely, LED[0] and LED[1] turn ON until finishing PCIe
initialization process. After that, LED[1] changes to OFF when PCIe completes
initialization process.
15-Jul-21
Table 2-1 LED Definition
ON
Normal operation
System is busy
IP Error detect
Data verification fail Normal operation
Figure 2-10 LED status after finishing PCIe initialization
1) PCIe Clock or system Clock is not locked.
2) Reset button is pressed.
Idle status
Normal operation
OFF
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